Registration OPEN for VDAT-2023

Design Contest

SUBMISSION : Design Contest submission can be in any area of interest to VDAT-2023 (refer to call for papers flyer/website)

Stage-1: Idea Submission (On or before July 31, 2023)

  • Your idea submission should cover a brief description of the idea along with a block diagram of your idea.
  • Examples of it’s application.
  • Benefits and value addition of your solution.
  • Your team description along with your contact information with mailing address.
  • Idea submission should be restricted to 2-4 pages (pdf)

Stage-2: Final Implementation (On or before August 25, 2023)

  • Implementation of the proposed design should be done at circuit simulation/logic simulation/architecture simuation /SoC kit.
  • Provide detailed design, methdology, results, conclusion.
  • Your team description along with your contact information with mailing address.

Stage-3:

  • Communication of design selections for presentation at VDAT-2023 (On or before August 31, 2023)
  • Presenting member(s) must register for VDAT-2023

Format for Final Presentation at VDAT:

  • Title
  • Motivation
  • Idea
  • Design Details
  • Methodology
  • Results
  • Summary

** The Design details may please be submitted at : nitin80@pilani.bits-pilani.ac.in (Dr. Nitin Chaturvedi, organizing chair, VDAT-2023)

VDAT-2023

The VLSI Design & Test Symposium (VDAT) promotes research and development in various fields of VLSI Design. VDAT began as a small workshop in the year 1998, and in 2005 it acquired the status of an international symposium.

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BITS Pilani, Pilani Campus, Vidya Vihar, Pilani 333031, Rajasthan, India

vdat2023@pilani.bits-pilani.ac.in

+91-1596 - 2555322

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